Genesys-Logic-GL3520-OVY22_C136620.pdf

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Genesys Logic, Inc.
GL3520
USB 3.0 Hub Controller
Datasheet
Revision 1.32
Jul. 15, 2011
GL3520 Datasheet
Copyright
Copyright
©
2011 Genesys Logic, Inc. All rights reserved. No part of the materials shall be reproduced in any
form or by any means without prior written consent of Genesys Logic, Inc.
Ownership and Title
Genesys Logic, Inc. owns and retains of its right, title and interest in and to all materials provided herein.
Genesys Logic, Inc. reserves all rights, including, but not limited to, all patent rights, trademarks, copyrights and
any other propriety rights. No license is granted hereunder.
Disclaimer
All Materials are provided “as is”. Genesys Logic, Inc. makes no warranties, express, implied or otherwise,
regarding their accuracy, merchantability, fitness for any particular purpose, and non-infringement of intellectual
property. In no event shall Genesys Logic, Inc. be liable for any damages, including, without limitation, any
direct, indirect, consequential, or incidental damages. The materials may contain errors or omissions. Genesys
Logic, Inc. may make changes to the materials or to the products described herein at anytime without notice.
Genesys Logic, Inc.
12F., No. 205, Sec. 3, Beixin Rd., Xindian Dist. 231,
New Taipei City, Taiwan
Tel : (886-2) 8913-1888
Fax : (886-2) 6629-6168
http://www.genesyslogic.com
©2011 Genesys Logic, Inc. - All rights reserved.
Page 2
GL3520 Datasheet
Revision History
Revision
1.00
1.10
1.20
1.21
1.22
1.30
1.31
1.32
Date
03/24/2011
04/20/2011
05/17/2011
05/23/2011
06/10/2011
06/17/2011
06/24/2011
07/15/2011
First formal release
Update QFN64 pin assignment
Modify QFN88 package dimension, p.31
Modify Table 7.2
-
Operating Ranges, p.25
Modify QFN64 package dimension, p.32
Revise typo, p.26
Update CH7.4 Power Consumption, p.26, 27
Update crystal tolerance range, p.25
Update CH3.2 Pin Descriptions, RTERM I/O type, p.12
Description
©2011 Genesys Logic, Inc. - All rights reserved.
Page 3
GL3520 Datasheet
Table of Contents
CHAPTER 1
CHAPTER 2
CHAPTER 3
GENERAL DESCRIPTION....................................................................... 7 
FEATURES .................................................................................................. 8 
PIN ASSIGNMENT..................................................................................... 9 
3.1 Pinout.............................................................................................................................. 9 
3.2 Pin Descriptions ........................................................................................................... 11 
CHAPTER 4
CHAPTER 5
BLOCK DIAGRAM.................................................................................. 14 
FUNCTION DESCRIPTION ................................................................... 15 
5.1 General Description .................................................................................................... 15 
5.1.1 USB 2.0 USPORT Transceiver........................................................................... 15 
5.1.2 USB 3.0 USPORT Transceiver........................................................................... 15 
5.1.3 PLL (Phase Lock Loop) ...................................................................................... 15 
5.1.4 Regulator .............................................................................................................. 15 
5.1.5 SPI Engine ............................................................................................................ 15 
5.1.6 RAM/ROM/CPU.................................................................................................. 15 
5.1.7 UTMI (USB 2.0 Transceiver Microcell Interface)............................................ 15 
5.1.8 SIE (Serial Interface Engine).............................................................................. 15 
5.1.9 Control/Status Register ....................................................................................... 15 
5.1.10 Power Management Engine .............................................................................. 16 
5.1.11 Router/Aggregator Engine................................................................................ 16 
5.1.12 REPEATER ....................................................................................................... 16 
5.1.13 TT ........................................................................................................................ 16 
5.1.14 CDP Control Logic ............................................................................................ 18 
5.1.15 USB 3.0/USB 2.0 DSPORT Transceiver.......................................................... 18 
5.2 Configuration and I/O Settings .................................................................................. 19 
5.2.1 RESET Setting ..................................................................................................... 19 
5.2.2 PGANG Setting.................................................................................................... 20 
5.2.3 SELF/BUS Power Setting ................................................................................... 21 
5.2.4 LED Connections ................................................................................................. 21 
5.2.5 Power Switch Enable Polarity ............................................................................ 21 
5.2.6 Port Number Configuration ............................................................................... 22 
5.2.7 Non-removable Port Configuration ................................................................... 22 
©2011 Genesys Logic, Inc. - All rights reserved.
Page 4
GL3520 Datasheet
CHAPTER 6 USB-IF BATTERY CHARGING SPECIFICATION REV.1.1
SUPPORT ............................................................................................................................... 23 
6.1 Background .................................................................................................................. 23 
6.2 Charging Downstream Port (CDP)............................................................................ 23 
6.3 Charging Detection Hardware Handshaking ........................................................... 23 
6.4 Dedicated Charging Port (DCP) ................................................................................ 24 
6.5 Port Numbers of Charging Downstream Port Configuration................................. 24 
CHAPTER 7 ELECTRICAL CHARACTERISTICS ..................................................... 25 
7.1 Maximum Ratings ....................................................................................................... 25 
7.2 Operating Ranges ........................................................................................................ 25 
7.3 DC Characteristics ...................................................................................................... 26 
7.3.1 DC Characteristics except USB Signals............................................................. 26 
7.3.2 USB 2.0 Interface DC Characteristics ............................................................... 26 
7.3.3 USB 3.0 Interface DC Characteristics ............................................................... 26 
7.4 Power Consumption .................................................................................................... 26 
7.5 AC Characteristics ...................................................................................................... 28 
7.6 On-Chip Power Regulator .......................................................................................... 30 
CHAPTER 8 PACKAGE DIMENSION........................................................................... 31 
CHAPTER 9 ORDERING INFORMATION................................................................... 33 
©2011 Genesys Logic, Inc. - All rights reserved.
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