PBL3860A-6.PDF

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March 1997
Application Note
PBL 3860A/6 Ring Through SLIC
The Ring Through SLIC ( RTS )
application is a method to allow a low
voltage ring-signal to be amplified in the
SLIC and transferred to the subscriber.
There are several advantages with this
application compared to a traditional
solution. First of all no high voltage ring-
generator is needed. Furthermore, since
the ring-signal is connected to the line,
in the same way as an ordinary voice
signal, no ring relay is required either.
The ordinary internal SLIC ring-trip
detector is not used in this application.
Therefore the ordinary ring-trip network
is omitted.
With a battery voltage, VBat, of -80V
during ringing, a balanced sine wave
ring-signal of minimum 40Vrms is
guaranteed across a 5REN load at the
end of a 100Ω wire resistance loop.
Transmit Gain
The two-wire to four-wire gain between
the TIPX - RINGX input and the VTX -
ground output is calculated as
Z
T
/1000
G
2-4
=
Z
T
/1000 +2 • (R
F
+ R
P
)
Receive Gain
The four-wire to two-wire gain between
the TIPX - RINGX output and the V
RX
to
ground input is calculated in the active
state, as:
-Z
T
Z
RX
Z
L
Z
T
/1000 + 2 • (R
F
+ R
P
) + Z
L
This stage decreases the amplitude of
the signal 39 times and relates it to
ground. Due to the fact that we don’t
want leakage from the line to ground the
resistors need to be high impedance,
therefore the values are:
R
DT1
, R
DR1
= 10kΩ, R
DT2
, R
DR2
= 390kΩ
As the RSN input on the SLIC is a
current input this pin can be used to mix
the signal from the ring-loop and the
signal source. The output voltage from
the ring-loop is fed to a switch, which in
its turn is connected to the RSN pin, by
the RRS resistor. In the same way the
signal source is connected to this point
via the RRG resistor. When the switch is
turned on, these resistors acts as
voltage to current converters.
The resulting current that flows into the
RSN input, IS, can be calculated as
follows:
Vg(t)
I
S
(t) =
R
RG
+
R
RS
β
• V
TR
(t)
G
4-2
=
•
If R
T
= 442 kΩ, R
F
= R
P
= 40
Ω,
V
TR
/V
RX
=1
and Z
L
= 600
Ω
this yields R
RX
=221 kΩ.
Balance Network
Z
RX
Z
T
Z
T
/100 0+ 2 • (R
F
+R
P
) + Z
L
2 • (R
F
+ R
P
) + Z
L
Programming of the SLIC
For the programming of the battery feed
characteristics and loop detector level,
refer to the Telecommunication Circuits
Databook. Those parts that are affected
in the RTS application will be explained
in this application note.
Output Impedance
The two-wire impedance, ZTR ,
presented by the SLIC to the line in
active mode (except during the ring-
burst) is calculated as:
Z
T
Z
TR
=
+ 2 (R
F
+ R
P
)
1000
Thus with Z
TR
and R
F
known:
Z
T
= 1000 • (Z
TR
- 2 • (R
F
+ R
P
)
where Z
TR
= the SLIC’s two-wire (tip-
ring) interface impedance.
R
F
= the line resistor, R
P
= SLIC
protection resistor. Z
T
= the SLIC two-
wire impedance programming
impedance.
Chose R
F
=40Ω, R
P
=40Ω.
R
TR
=600Ω yields R
T
=442kΩ.
R
B
= R
TX
•
•
from which, with our suggested
component values, RB=15.8 kΩ
Ring-Signal Connection
The ring-signal can be generated in a
CODEC with assistance from the device
processor, which may send the
appropriate stream of bytes to the
CODEC. With this approach any desired
ring-signal shape can be generated,
maximising output amplitude and
minimising EMI. The R
SIN
and V
RX
nodes
are both connected to the CODEC, and
the ring-signal is injected in the same
way as an ordinary voice signal.
Operation of the Ring Loop
During ringing the line voltage is
monitored by the differential stage,
consisting of an operational amplifier
and resistors R
DT1
, R
DR1
, R
DT2
and R
DR2
.
where Vg(t) is the signal from the signal
source.
β
= R
Dx1
/ R
Dx2
=1/39, x = TIP / RING.
The ring-signal from the SLIC will be
balanced about V
Bat
/ 2.
The Ring Loop Switch
To connect the ring-loop when ringing
there must be an external switch
between the RSN input and the R
RS
and
R
RG
resistor. Normally, when not in ring-
mode, this switch should be open.
This switch could be implemented in
different ways, see fig 1. The best
performance is achieved using an
6-7
PBL 3860A/6
analogue multiplexer like the 74HC4053
or similar, this device includes three
switches. The second best choice is to
use the 4066/-16, this device is suitable
for two lines.
The 4066/-16 device needs a level
shifter since the low state must equal
VEE , due to the internal design. The
noise from the ring loop and ring signal
source will be lower in the case of using
the 4053. Since this is a double pole
switch the signal will be fed to ground
when not in ring mode.
Control Inputs
To be able to use the SLIC as a ring-
signal amplifier it must be put in the
active state during the ring-burst and
NOT in the ring-mode, this is because
the internal output stage has to be used.
To be able to switch the ring-loop on
and off there is an additional control
signal: C0. This signal is connected to
the switch described in the previous part.
state:
I
Preliminary
Application of V
Bat
The battery should be switched to
-80V, to be able to fulfil the Bellcore
requirements of min 40Vrms over a
5REN load with a sine wave. The battery
switching can be solved in one of two
ways, either using switching of a dual
VBat supply (of -48V and -80V e.g. ), or
by using a programmable DC/DC
converter.
In order to minimise the power
dissipation in the SLIC the maximum
VBat current shall be limited to 70mA
when using a voltage below -60V.
A suggestion of a VBat switch is
presented in the figure 5, where
V
BAT2
> V
BAT1
.
Ring Trip Detection
As the SLIC’s internal ring-trip detector
can’t be used in this application, ring trip
must be arranged in another way.
In the case of up to 5REN load
connected to a short line ( of up to 100Ω
) the SLIC loop detector can be used to
detect off-hook during ringing with the
help of one extra resistor and a switch,
see fig 2.
RD
10k
R
DR
39k
R
D
4053 or
4066/-16
C0
This solution minimises the number
of external components.
There might be a need for software
filtering of the detector signal because it
will ripple, but in most cases this will not
be necessary. See fig 3 for the behaviour
of the states at the DET pin and voltage
at the RD pin.
1
0
DET
GND
trigger level
V
EE
ON hook
OFF hook
Fig. 3 Ring-trip detector behaviour.
For other cases and methods, please
do not hesitate to contact Ericsson
Components for assistance.
Over-Voltage Protection
When using the SLIC as a ring generator
the over-voltage protection ( OVP ) must
be carefully considered in order to meet
the requirements of the SLIC with the
higher than usual voltages supplied to
the line.
As the line voltage, depending of VBat,
can be over 60V a programmable
transient voltage suppressor must be
used. We recommend Texas
Instruments TISP PBL1, TISP61CAP3 or
TISP61089 which all can handle 80V.
Make sure that V
Bat
is connected to the
SLIC and the gate of the OVP in the
proper way:
The SLIC and the OVP ground should
be tied together on the PCB.
A capacitor of min 220nF should be
connected close to the gate of the OVP,
to decouple the VBat voltage when the
OVP starts to conduct. This can be done
by placing the CBat capacitor close to
the gate of the transient protector.
The R
F
resistors limits the transient
currents and R
P
limits the currents to the
SLIC while the OVP conducts. R
P
is very
important in this application to prevent
the output-stages TIPX and RINGX from
being damaged, if the OVP conducts
during ringing.
Power cross protection is provided by
the R
F
resistors in conjunction with the
OVP. For the R
F
resistors, we
recommend Ericsson Components’
thickfilm resistors PBR510 12/1 (2•40Ω),
C0
II
C1
0
0
1
0
0
0
0
1
C2
0
1
1
1
Open circuit
Active
Ringing
Stand-by
1
1
0
1
For the different types of switches C0 is
configured as follows, se fig. 1:
I: applies to 4016 and 4066.
4053 can be used in both modes.
RRS
4053
RSN
(a)
V
EE
Fig. 2 Ring trip components.
RRG
C0
(a)
RRS
4066 /-16
RSN
The RD resistor is calculated as follows
385 • R
D
R
DR
=
R
D
• I
L
- 375
Where IL is the peak line current
threshold when ringing. For a 5REN load
and a V
BAT2
of -80V, I
L
is 48mA. This
results in a RDR resistor of 10kΩ.
This can be achieved because of the
change in impedance when the phone
goes off-hook. During ringing the
impedance is larger than 1,4kΩ, even for
5REN, and when a phone goes off-hook
it will decrease to less than 500Ω.
RRG
V
CC
100k
C0
100k
BC557
V
EE
(b)
Fig. 1 Ring loop
switches.
6-8
Preliminary
which are designed to fail open circuit
without catching fire when exposed to
electrical overload.
Power Dissipation
The short circuit SLIC power dissipation
PShTot is:
P
ShTot
= I
LSh
• (Vbat - I
LSh
• 2 • (R
F
+R
P
)) + P
3
where VBat is the battery voltage
connected to the SLIC at pin V
BAt
.
2.5 • 1000
I
LSh
=
RDC1 + RDC2
is the constant loop current. P3 is on-
hook active state power dissipation ( typ
200mW; VBat = -48V ). Note that a short
circuited loop is not a normal operational
condition. The terminating equipment will
add some dc resistance ( 150 to 300
Ω
)
even if the wire resistance is close to 0Ω.
During ringing the highest power
dissipation occurs when the line is 0Ω
and maximum number of bells are
connected ( 5REN ). With the suggested
values given in this note the maximum
line current ILmax will be 47 mA. The
power drawn from the supply is then with
class-B amplifiers:
2 • 80 • 47
P
S
=
π
+ P
idle
≈
2.6W
and the CGO capacitor must be short
and wide.
The SLIC and the OVP ground should
be tied together on the PCB.
Ring Voltage
First we define: Crest factor
^
=
PBL 3860A/6
In this application note we have used
an Wien bridge sine wave oscillator. The
circuit uses two resistors and one diode
to stabilise the amplitude, se fig 4.
V
CC
8.2k
V
^
V
rms
The following two tables define the
voltage over the bell under different
conditions. First the load voltage as a
function of line length, number of bells
and shape of the ring signal when
VBat = -80V, RSIN = 2.0V peak.
Load
#REN RL
1
3
5
1
3
5
1
3
5
0
100
100
0
100
100
0
100
100
Crest
factor
1.41; sin
1.41; sin
1.41; sin
1.20
1.20
1.20
1.05
1.05
1.05
Load
voltage
52.2
47.2
43.5
62.9
57.0
52.6
72.0
65.2
60.2
1N4004
10k
20k
1.3k
RSIN
360k
R
C
22nF
360k
R
22nF
C
Fig. 4 Wien bridge sine wave oscillator.
With components values shown, the
RSIN output will be an 1.4Vrms sine
wave with a frequency of 20Hz.
The frequency is determined by Resistor
R and capacitor C according to
1
f=
2•
π
R•C
In the next table the required VBat to
achieve a specific voltage over the bell
( 40 or 50 V ) is presented, the load is
fixed at 3 or 5REN with 100Ω wire
resistance. RSIN as above.
Load
voltage
40
40
50
40
50
Crest
factor
1.41; sin
1.20
1.20
1.05
1.05
Vbat [V]
3REN 5REN
67.2
56.4
70.5
49.4
61.3
73.0
61.2
76.1
53.2
66.8
The output power from the SLIC is:
P
out
= I
lrms2
• (Z
bell
+2 • (R
F
+R
P
))
≈
1.7W
This means that the power dissipation in
the SLIC is about 0.9W during ringing,
which is within the limit for maximum
ratings.
Unused Inputs / Outputs
DT (pin 3), DR (pin 4) and RINGRLY
(pin 9) are not used in this application:
leave open.
PCB Layout
Care in PCB layout is essential for
proper PBL3860A/6 function. The
components connected to the RSN input
(pin 16 for PLCC) should be in close
proximity to that pin such that no noise is
injected into the RSN terminal. Ground
plane surrounding the RSN pin is
advisable.
The track between the gate of the OVP
There is no need to use one oscillator for
each line, depending on the amplifiers
current capability. So if the current
driving capability of the amplifier is high
enough, only one oscillator is required
per line card, regardless of the number
of lines.
Ring Signal Generator
There are different ways of generating
the low voltage ring signal.
One is to use the CODEC as a
oscillator, this can be done if access to
the PCM bus is provided. The micro
controller feeds the CODEC with a
stream of bytes to generate the desired
frequency and amplitude.
Another choice is to use a D/A
converter connected to the micro
controller.
Then there are different kinds of
oscillator circuits.
6-9
PBL 3860A/6
Preliminary
NC
S-b
RD
CHP
CEE
RT
V
EE
RDC1
RDC2
RRX
RB
VRX
RTX
VFLT
RDR
V
EE
20
TIP
RF1
1
2
3
TIP
GATE
NC
RING
TIP
GND
8
7
6
5
RP1
CTC
NC
NC
HPT
RD
DT
DR
TIPX
RINGX
BGND
VCC
HPR
VTX
VEE
RSN
AGND
RDC
C1
C2
DET
E0
NC
21
19
18
16
15
14
13
12
11
9
8
22
23
25
PBL3860A/6
OVP
RING
GND
RING
26+27
RF2
4
RP2
CRC
1+28
2
V
CC
VCC
V
CC
GND
DBAT1
VEE
V
EE
RBAT
V
EE
RBSD
VBAT1
DBAT
QBS
RBS
QBSD
RBS1
VBAT2
DBAT2
V
CC
CGO
4
CDC
Sa
NC
CCC NC
5
RINGRLY
VBAT
RSG
3+6+10+17+24
7
See fig. 1
CBAT
RSG
V
EE
RDT2
RDT1
RRS
RRG
RSIN
RDR2
OPa
STATE
Open circuit
Active
Ringing
Stand-by
C0
1
1
0
1
C1
0
0
0
1
C2
0
1
1
1
RDR1
C2
C1
C0
E0
DET
Part list
SLIC
OVP
OPa
Sa, b
QBS
QBSD
DBAT
DBAT1
DBAT2
RF1, 2
RP1, 2
PBL3860A/6
TISP 61CAP3
LM324
74HC4053
MPSA42
MPSA92
1N4004
10MQ090
1N4004
PBR510 12/1 2*40Ω
39Ω
≥1/4
W
RBAT
RSG
RDC1, 2
RD
RDR
RT
RRX
RTX
RB
RDT1, RDR1
RDT2, RDR2
5.1Ω 5%
≥1/4
W
*
51k*
39k*
10k*
442k*
221k*
20k*
15.8k*
10k
390k
RRS, RRG
RBS
RBS1
RBSD
CBAT
CGO
CTC, CRC
CHP
CDC
CCC, CEE
2k
22k
10k
2k
0.22µF100V
0.22µF100V
2.2nF 100V
10nF 100V
1µF
220nF
All resistors are 1%
Fig. 5 Components marked with * are application dependent, see this note and Telecomunication Circuits Databook for more
information.
Information given in this data sheet is believed to be
accurate and reliable. However no responsibility is
assumed for the consequences of its use nor for any
infringement of patents or other rights of third parties
which may result from its use. No license is granted
by implication or otherwise under any patent or patent
rights of Ericsson Components. These products are
sold only according to Ericsson Components' general
conditions of sale, unless otherwise confirmed in
writing.
Specifications subject to change
without notice.
LZT Over-voltage protection Uen Rev. A
© Ericsson Components AB, May 1997
6-10

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