PWM pulse with modulation 16f877.docx

Book: PIC Microcontrollers

PWM module pulse with modulation

·         TOC

·         Introduction

·         Ch. 1

·         Ch. 2

·         Ch. 3

·         Ch 4.

·         Ch. 5

·         Ch. 6

·         Ch. 7

·         Ch. 8

·         Ch. 9

·         App. A

·         App. B

·         App. C

Chapter 5: CCP Modules

The abbreviation CCP stands for Capture/Compare/PWM.

The CCP module is a peripheral which allows the user to time and control different events.

Capture Mode, allows timing for the duration of an event. This circuit gives insight into the current state of a register which constantly changes its value. In this case, it is the timer TMR1 register.

Compare Mode compares values contained in two registers at some point. One of them is the timer TMR1 register. This circuit also allows the user to trigger an external event when a predetermined amount of time has expired.

PWM - Pulse Width Modulation can generate signals of varying frequency and duty cycle.

The PIC16F887 microcontroller has two such modules - CCP1 and CCP2.

Both of them are identical in normal mode, with the exception of the Enhanced PWM features available on CCP1 only. This is why this chapter describes the CCP1 module in detail. Concerning CCP2, only the features distinguishing it from CCP1 will be covered.

Complicated? All this is only a simplified explanation on their operation. Everything is much more complicated in practice because these modules can operate in many different modes. Try to analyze their operation on the basis of the tables describing bit functions. If you use any CCP module, first select the mode you need, analyze the appropriate figure and then start changing bits of the registers or else...

CCP1 Module

A central part of this circuit is a 16-bit register CCPR1, which consists of the CCPR1L and CCPR1H registers. It is used for capturing or comparing with binary number stored in the timer register TMR1 (TMR1H and TMR1L).

Fig. 5-1 CCP1 Module

In Compare mode, if enabled by software, the timer TMR1 reset may occur on match. Besides, the CCP1 module can generate PWM signals of varying frequency and duty cycle.

Bits of the CCP1CON register controls the CCP1 module.

CCP1 in Capture mode

In this mode, the timer register TMR1 (consisting of TMR1H and TMR1L) is copied to the CCP1 register (consisting of CCPR1H and CCPR1L) in the following situations:

·         Every falling edge (1 » 0) on the RC2/CCP1 pin;

·         Every rising edge (0 » 1) on the RC2/CCP1 pin;

·         Every 4th rising edge (0 » 1) on the RC2/CCP1 pin; and

·         Every 16th rising edge (0 » 1) on the RC2/CCP1 pin.

The combination of the four bits (CCP1M3 - CCP1M0) of the control register determines which of these events will trigger 16-bit data transfer. In addition, the following conditions must be met:

·         RC2/CCP1 pin must be configured as input; and

·         TMR1 module must operate as timer or synchronous counter.

Fig. 5-2 CCP1 in Capture mode

The flag bit CCP1IF is set when a capture is made. If it happens and if the CCP1IE bit of the PIE register is set, then an interrupt occurs.

When the Capture mode is changed, an undesirable capture interrupts may be generated. In order to avoid that, both a bit enabling CCP1IE interrupt and flag bit CCP1IF should be cleared prior to any change occuring in the control register.

Undesirable interrupt may be also generated by switching from one capture prescaler to another. To avoid this, the CCP1 module should be temporarily switched off before changing the prescaler.

The following program sequence is recommended:

BANKESEL CCP1CON

CLRF     CCP1CON     ;CONTROL REGISTER IS CLEARED

                     ;CCP1 MODULE IS OFF

MOVLW    XX          ;NEW PRESCALER MODE IS SELECTED

MOVWF    CCP1CON     ;NEW VALUE IS LOADED TO THE CONTROL REGISTER

                     ;CCP1 MODULE IS SIMULTANEOUSLY SWITCHED ON

CCP1 in Compare mode

In this mode, the value in the CCP1 register is constantly compared to the value in the timer register TMR1. When a match occurs, the output pin RC2/CCP1 logic state may be changed, which depends on the state of bits in the control register (CCP1M3 - CCP1M0). The flag-bit CCP1IF will be simultaneously set.

Fig. 5-3 CCP1 in Compare mode

To setup CCP1 module to operate in this mode, two conditions must be met:

·         Pin RC2/CCP1 must be configured as output; and

·         Timer TMR1 must be synchronized with internal clock.

CCP1 in PWM mode

Signals of varying frequency and duty cycle have a wide application in automation. A typical example is a power control circuit whose simple operation is shown in figure 5-4 below. If a logic zero (0) represents switch-off and logic one (1) represents switchon, the power that the load consumes will be directly proportional to the pulse duration. This ratio is often called Duty Cycle.

Fig. 5-4 CCP1 in PWM mode

Another example, common in practice, is the usage of PWM signals in the circuit for generating signals of arbitrary waveforms, for example, sinusoidal waveform. See figure 5-5 below:

Fig. 5-5 CCP1 in PWM mode with filtration

Devices which operate in this way are often used in practice as switching regulators which control the operation of motors (speed, acceleration, deceleration etc.).

Fig. 5-6 PWM module

The figure above shows the block diagram of the CCP1 module setup in PWM mode. In order to generate a pulse of arbitrary form on its output pin, it is necessary to determine only two values- pulse frequency and duration.

Fig.5-7 PWM Mode

PWM Period

The output pulse period (T) is specified by the PR2 register of the timer TMR2. The PWM period can be calculated using the following equation:

PWM Period(T) = (PR2 +1) * 4Tosc * TMR2 Prescale Value

If the PWM Period (T) is known then, it is easy to determine the signal frequency F because these two values are related by equation F=1/T.

PWM Duty Cycle

The PWM duty cycle is specified by using in total of 10 bits: eight MSbs found in the CCPR1L register and two additional LSbs found in the CCP1CON register (DC1B1 and DC1B0). The result is 10-bit number contained in the formula:

Pulse Width = (CCPR1L,DC1B1,DC1B0) * Tosc * TMR2 Prescale Value

The following table shows how to generate PWM signals of varying frequency if the microcontroller uses 20 MHz quartz-crystal (Tosc=50nS).

Table 5-1 PWM Duty Cycle

At last, two notes:

·         Output pin will be constantly set in case the pulse width is by negligence determined to be larger than PWM period; and

·         In this application, the timer TMR2 Postscaler cannot be used for generating longer PWM periods.

PWM Resolution

PWM signal is nothing more than the pulse sequence with varying duty cycle. For one specified frequency (number of pulses per second), there is a limited number of duty cycle combinations. This number is called resolution measured by bits. For example, a 10-bit resolution will result in 1024 discrete duty cycles, whereas an 8-bit resolution will result in 256 discrete duty cycles etc. In relation to this microcontroller, the resolution is specified by the PR2 register. The maximal value is obtained by writing number FFh.

PWM frequencies and resolutions ( Fosc = 20MHz):

Table 5-2 PWM Frequencies and Resolutions

PWM frequencies and resolutions ( Fosc = 8MHz):

Table 5-3 PWM Frequencies and Resolutions

CCP1CON Register

Fig. 5-8 CCP1CON Register

P1M1, P1M0 - PWM Output Configuration bits - In all modes, excepting PWM, the P1A pin is Capture/Compare module input. P1B, P1C and P1D pins act as input/output port D pins. In PWM mode, these bits affect the CCP1 module as shown in the table 5-4 below:

Table 5-4 CCP1CON Register

DC1B1, DC1B0 - PWM Duty Cycle Least Significant bits - are only used in PWM mode in which they represent two least significant bits of a 10-bit number. This number determines PWM signal’s duty cycle. The rest of bits (8 in total) are stored in the CCPR1L register.

CCP1M3 - CCP1M0 - CCP1 Mode Select bits determine the mode of the CCP1 module.