The material contained in this document is of an experimental nature. As such, all consequences resulting from the use of the information is the express responsibility of the user. The author shall not be held liable, and implies no warranties or guarantees what so ever. The author does certify that the information presented was correct, to his knowledge, at the time of the first distribution of the document. This document and the information it contains is the sole property of the author, who retains all copyrights, and patents to the material presented. The author does grant a limited distribution right to all if the following conditions are satisfied: The document is distributed in complete and unaltered form, with this legal form included. No commercial distribution (ie. publishing) of the document is entered into without the written consent of the author. Lastly, no monies shall be exchanged for the distribution of the document, except for reproduction and shipping charges, without the written permission of the author. With these conditions fulfilled, the limited distribution license grants the holder of the document to otherwise freely distribute, and store it in any manner. Beyond 512 kb: The Two Megabyte REU ----------------------------------- By Andrew E. Mileski Copyright October 3, 1989. In Volume 9, Issue 6 of the Transactor, Paul Bosacki showed us a miracle; the one megabyte C64. Paul had developed an elegant method of allowing the C64 to access this extra memory out of the C64's own memory map. Unfortunately, this extra RAM is rather difficult to access, not all of it is available to the user, and C128 owners cannot expand there machines in the same manner. The circuit necessary for this feat allows a C64 to use 256 k RAM chips, instead of the 64 k RAM chips it was designed to use. Although a brilliantly simple circuit, it is over-kill when one already has a Ram Expansion Unit (REU) that directly supports 256 k RAM chips! Expanding a REU is relatively simple, and if you already know how to program a REU you can easily take advantage of an expanded one. In fact, all your software that uses a REU is completely compatible! Now are fellow C128 owners can expand their machines easily too, since the extra RAM is accessed out of a REU, and not off a modified mother-board! In a 512 kb REU, there are two dynamic RAM chip banks on the circuit board. They each consist of eight, 1 bit by 256 k dynamic RAM chips, which gives us our 512 k bytes. The REU's internal bank register at $DF06 works in 64 kb increments, and has only eight of these REU banks. Banks 0 to 3 are accessed out of chip bank one (U2 to U9), and banks 4 to 7 are accessed out of chip bank two (U10 to U17). Please note the distinction between chip banks, and REU banks. Note: signals preceeded by an asterisk indicate that they are active low Dynamic RAM Basics ------------------ Dynamic RAM memory chips are constructed with multiplexed address inputs. This means that they carry different information at different times. To access a particular memory cell, we first supply the chip with half of the actual address, a row address. Next we latch this address into the chip by asserting the Row Address Strobe (*RAS). Now we supply the chip with the other half of the address, the column address. Once again we latch this address into the chip by asserting the Column Address Strobe (*CAS). Depending on the state of the Write Enable (*WE) signal, a read or write memory cycle will occur. Unfortunately dynamic RAMs forget everything unless they are reminded, or refreshed. This must be done about every 4 milliseconds! To refresh the memory a RAS only cycle must be done for every row address. This means that only the row address is latched into the chip; the column address is not needed here. The entire row of data stored in the chip will be refreshed, and our data will be safe for another few milliseconds. In a REU the RAM Expansion Controller (REC) chip takes care of all this for us. Fooling the REC --------------- Since a REU was only designed to access 512 kb of expansion memory, we must fool it in order to access more. We do this by letting the REU think that it has only 512 kb available at any one time. This means we need some way to switch between the extra banks of memory. The circuit shown in the schematic helps us to do this by adding two bits to the REU bank select register. This two bit output port lets us select one of four banks of 512 kb. So in other words, are REU now thinks it is four seperate 512 kb REUs. Now we can easily access up to 2 Mb out of a REU! How the circuit works --------------------- The secret to expanding dynamic memory lies in the *CAS signal. Since all the RAM chips need to be refreshed with *RAS, we don't do anything to this signal and pass it to all memory chips. This leaves us with manipulating *CAS. Manipulation of *CAS is the job of IC1, a dual two to four line decoder/demultiplexor. It is used to direct the REC signals *CAS0 (chip bank one), and *CAS1 (chip bank two), to the correct bank of eight RAM chips. When one of the REC CAS signals is asserted, the CAS signal of the selected bank is asserted. The bank selection is done with the two select inputs S0 and S1 of IC1. IC2 and IC3 form a two bit write-only register, whose outputs are the bank select inputs to IC1. Bits 3 and 4 of the REU bank register at $DF06 are latched into IC2, two D type flip-flops, on the negative edge of the system clock (theta2). By mapping our new two bit register to these normally unused bits, the extra memory appears to the user as extra 64k banks beyond the normal maximum of 512 kb. IC3 is a 3 to 8 line decoder/demultiplexor, which is used to decode the lowest three bits of the I/O2 page ($DF00 to $DFFF) address. The IC3 signal *O6 is used as the clock signal for the two flip-flops, which latches bits 3 and 4 of the data bus on the positive edge. This happens whenever $DF06 is written to. On a read memory cycle to $DF06, IC3 is disabled and the REU's regular internal register appears on the data bus. A switch pulls the *CLR inputs to each of the flip-flops low when it is closed (position 1). This forces them to select bank zero of 512 kb at all times, which is present in all 512kb REUs. When the switch is open (position 2), the flip-flops can freely take on the values of bits 3 and 4 of $DF06. This allows complete software compatibility with a 1750 (512 kb) REU. Lastly, the two Light Emitting Diodes (LEDs), which are optional, simply show us (in binary) what bank of 512k we are using. They allow us to quickly check software compatibility, as explained later. Installation ------------ All the expansion hardware fits inside the REU case. You will not be able to use the RF shield, and it will be a very tight fit with all 2 Mb installed (don't use IC sockets!). Start by expanding your REU to 512 kb, or in other words you need a 1750 REU. See Volume 9, Issue 5 of the Transactor, or the article by ScottB30 on Quantum Link for expanding 1764 and 1700 REUs. Take the usual static precautions, and of course, any modification to the REU will void the warranty! Proceed at your sole risk! On the component side of the REU, with the edge connector towards you, locate Resistor Package RP3 on the left side near the middle of the board. Flip the board over to the solder side, again with the edge connector towards you. Locate RP3 again on the right side of the board. From the top of the board, find pin 7 of RP3 and cut the trace leading away from the pin. Solder a wire to this pin (pin 7); this is the *CAS0 signal. Find pin 3 of RP3 and again cut the trace leading away from the pin. Solder a wire to this pin (pin 3); this is the *CAS1 signal. Flip the board over to the component side with the edge connector towards you, and locate ram chips U2 and U10 on the top left side of the board. Flip the board over to the solder side and again locate these chips. To pin 15 of U2 solder a wire; this is the *CASBANK0 signal. Solder a wire to pin 15 of U10; this is the *CASBANK1 signal. Run the four wires you now have, down to the right side of the edge connector and secure them in the corner with a piece of electrical tape. This completes all the solder connections to the solder side of the board. Locate the fifth pin from the right on the edge connector and follow the trace to a component leg; note the placement. Flip the board to the component side for the last time, and locate the component. It is labeled FB2, and should be a Ferrite Button, but is a 430 Ohm resistor (yellow, orange, brown, gold bands) on my REU. To the opposite end of the component, away from the edge connector, solder a wire; this is the system clock signal theta2. Locate the thirteenth pin from the right on the edge connector. Follow the trace to a pass-through, and solder a wire into it; this is the *I/O2 signal. Locate the eighteenth pin from the right of the edge connector, and follow the trace to Ferrite Button FB1. To the side away from the edge connector solder a wire; this is the R/*W signal. Locate the empty pinout (U18) next to the square REC chip. Solder wires into the holes for pins 8, 9, 10, 14, 15, 16, and 28. These are the signals A2, A1, A0, Ground, D3, D4, and +5 volts respectively. This completes the signal hunting. Lay a 2 inch strip of double-sided foam tape ...
Amiga7878