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APR9/D
Rev. 1
Full-Duplex
32-Kbit/s CCITT
ADPCM
Speech Coding
on the
Motorola DSP56001
Digital Signal
Processors
M o t o r o l a ’ s
H i g h - P e r f o r m a n c e
D S P
T e c h n o l o g y
Illustrations
Figure 1-1
Figure 1-2
CCITT ADPCM Encoder Block Diagram
CCITT ADPCM Decoder Block Diagram
1-2
1-3
Figure 3-1
Figure 3-2
Figure 3-3
Figure 3-4
Figure 3-5
Figure 3-6
Figure 3-7
A/D Conversion Process
Quantization Noise Model
Uniform Quantizer
Feedforward APCM Coder
Feedback APCM Coder
DPCM Coder
ADPCM Coder
3-2
3-3
3-4
3-8
3-8
3-9
3-11
Figure 4-1
Figure 4-2
Figure 4-3
Figure 4-4
Figure 4-5
Figure 4-6
Figure 4-7
Figure 4-8
CCITT ADPCM Encoder Block Diagram (detailed)
PCM Conversion and Difference Signal
Computation
Adaptive Quantizer
Inverse Adaptive Quantize
Adaptive Prediction Filter
Predictor Pole Coefficient Adaptation for a
1
(k)
Predictor Pole Coefficient Adaptation for a
2
(k)
Predictor Zero Coefficient Adaptation
4-3
4-5
4-6
4-7
4-8
4-10
4-11
4-12
MOTOROLA
v
Illustrations
Figure 4-9
Figure 4-10
Figure 4-11
Figure 4-12
Figure 4-13
Scale Factor Adaptation
Speed Control Parameter Adaptation
Tone Detection
CCITT ADPCM Decoder Block Diagram (detailed)
Synchronous Coding Adjustment
4-13
4-15
4-17
4-19
4-20
Figure 5-1
Figure 5-2
Figure 5-3
Figure 5-4
Figure 5-5
Figure 5-6
Figure 5-7
Figure 5-8
Figure 5-9
Figure 5-10
Figure 5-11
Figure 5-12
Code Flow Diagram
Internal Data RAM Memory Map
Address Register Usage
Linear to Log Conversion Routine
Linear to Floating-Point Conversion Routine
Difference Signal Scaling and Quantization
Inverse Quantization and Scaling of
ADPCM Codeword
Adaptive Predictor Data Structure
Internal Data RAM Memory Map (Non-standard)
Address Register Usage (Non-standard)
Adaptive Prediction Filter
Adaptive Predictor Data Structure (Non-standard)
5-8
5-11
5-12
5-16
5-18
5-20
5-23
5-27
5-39
5-39
5-42
5-43
vi
MOTOROLA
List of Tables
Table 4-1
Table 4-2
Table 4-3
Quantizer Normalized Input/Output Characteristic
W(l) Lookup Table
F[l(k)] Lookup Table
4-6
4-14
4-16
Table 5-1
Table 5-2
Memory Usage
Code Execution Times
5-53
5-55
MOTOROLA
vii
SECTION 1
Introduction
“This
application
report will first
point out some
of the
advantages of
speech coding
in general and
then some of the
particular
advantages of
the CCITT
standard.”
T
his application report describes the implementation
of an Adaptive Differential Pulse Code Modulation
(ADPCM) speech coder on the Motorola DSP56001
digital signal processor. The algorithm described in
this document has been standardized by the Interna-
tional Telegraph and Telephone Consultative
Committee (CCITT) in Recommendation G.721 [1] for
digital speech coding in a telecommunications envi-
ronment. The standard, as defined by the CCITT,
specifies the translation of
µ-law
or A-law PCM encod-
ed speech at 64 kbit/s to ADPCM encoded speech at
32 kbits to provide a 2 to 1 compression of the speech
signal with very little perceptual loss of speech quality.
The algorithm also has added complexity to handle
non-speech signals such as modem signals. The
block diagrams of the CCITT ADPCM encoder and de-
coder are shown in Figure 1-1 and Figure 1-2.
1.1 Standard Version of
ADPCM
Two implementations of the ADPCM algorithm on the
DSP56001 are described in this document. The first
implementation adheres completely with the CCITT
Recommendation G.721 (revised version dated Au-
gust 1986). It provides bit-for-bit compatibility with the
MOTOROLA
1-1

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